An asynchronous power aware and adaptive NoC based circuit

Abstract

Abstract—In complex embedded applications, optimisation and adaptation of both dynamic and leakage power have become an issue at SoC grain. A fully power-aware globally- asynchronous locally-synchronous network-on-chip (NoC) circuit is presented in this paper. Network-on-chip architecture combined with a globally-asynchronous locally-synchronous paradigm is a natural enabler for DVFS mechanisms. The circuit is arranged around an asynchronous network-on-chip providing scalable communication and a 17 Gb/s ...